CompoundTek, STAr team for high-volume SiPh wafer test

Created August 23, 2020
300mm silicon wafer exposed on FLX-1200 multi-beam tool at 5kV on N40 BEOL stack.News and Business

Global foundry services provider CompoundTek and test solutions company STAr Technologies have formed a strategic collaboration to develop standards and solutions for cost-effective high-volume SiPh Wafer Test. Addressing the growing need for consistency and reliability across all applications of SiPh technology, the SiPh Wafer Test aims to spearhead the development of more standard processes and facilitate wider industry adoption and innovations from design through to test and inspection.

Currently, SiPh testing is fragmented with no recognised standards. Most of the companies have homegrown SiPh bench solution which is good for small scale engineering characterisation during the design verification phase, but inefficient for the high-throughput and low-cost test required for testing during the mass production phase. There is no independent SiPh wafer test service provider with a cost-efficient solution to address this market gap. Availing these capabilities helps the industry to drive down associated product costs from prototyping to mass manufacturing, and accelerate their time to market.

Raj Kumar, CompoundTek’s chief executive officer says, “To accelerate the market wider adoption of wafer-level Silicon Photonics tests – cost and efficiencies must be improved. To do so, we believe it is necessary to take a holistic approach by establishing partnerships that leverage expertise within the test technology value chain and that of the fabrication process. It is this synergy of measurement instrumentation, positioning and commercialisation technologies that will further standardise the way testing is done, the way the chip is laid out for ease of tests – that both CompoundTek and STAr effectively brings to the marketplace.”

Dr Jeffrey Lam, general manager and vice president of engineering of STAr Technologies adds,” When you think of working in a lab on an initial prototype, and spending a few hours to set up and align a single device for measurements, it seems feasible. It is not the case however, in high-volume SiPh manufacturing where time- and effort-intensive methods are not practical, and time-to-market is a critical factor. This has inhabited the rapid adoption of SiPh, a challenge we aim to effectively address with methods and strategies that have a unique relative emphasis on accuracy, throughput, and test flexibility, through our combined SiPh Wafer Test approach.”

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This article was written
by Peter Dykes

Peter Dykes is a independent telecoms and technology journalist who has over that last 30 years written for a wide range of B2B publications and companies. A former BT engineer, he specialises in networks and associated support systems. He is currently Editor of Optical Connections.