Fraunhofer HHI in TERIPHIC terabit optical module drive

Created February 5, 2019
Applications and Research

Germany’s Fraunhofer Heinrich Hertz Institute has announced its participation in the innovative EU-Horizon 2020 research project TERIPHIC. This project, which formally kicked off in Berlin in late January, is taking place against a background of efforts to develop optical interfaces with Terabit capacity for datacom applications.

The Institute notes that a practical path to the Terabit regime is to scale the current 400G modules. These are based (in the most forward looking version of the standards) on four parallel lanes, each operating with PAM4 at 53 Gbaud. Scaling these modules by adding lanes looks simple, but entails challenges with respect to the fabrication and assembly complexity that can critically affect their manufacturability and cost.

TERIPHIC aims to address these challenges by leveraging photonic integration concepts and developing a seamless chain of component fabrication, assembly automation and module characterisation processes as the basis for high-volume production lines of Terabit modules. The project will bring together EML arrays in the O-band, PD arrays and a polymer chip that will act as the host platform for the integration of the arrays and the wavelength mux-demux of the lanes. The integration will rely on butt-end coupling steps, which will be automated via the development of module specific alignment and attachment processes on commercial equipment. The optical subassembly will be mounted on the mainboard of the module together with linear driver and TIA arrays. The assembly process will be based on the standard methodologies of Mellanox and the use of polymer FlexLines for the interconnection of the TOSA/ROSA with the drivers and the TIAs.

Using these methods, TERIPHIC will develop pluggable modules with 8 lanes (800G capacity) and mid-board modules with 16 lanes (1.6T capacity) having a reach of at least 2 km. Compared to the 400G standards, the modules will reduce by 50% the power consumption per Gbits/s, and will have a cost of €0.3/Gbits/s. After assembly, the modules will be mounted on the line cards of Mellanox switches, and will be tested in real settings. A study for the consolidation of the methods and the set-up of a pilot assembly line in the post-project era will be also made.

Fraunhofer HHI is the core technology provider in the project, providing: the PolyBoard platform for hosting mux-demux functionalities and hybrid integration of active components; the PolyBoard FlexLine technology for electrical connectivity; the EML technology for light generation, modulation and amplification in a single chip; and the high bandwidth PD technology.

The project consortium consists of Fraunhofer HHI, ficonTEC, III-V Lab, Mellanox Technologies, and Telecom Italia, and is coordinated by ICCS of the NTU Athens.

https://www.fraunhofer.de/en.html

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This article was written
by John Williamson

John Williamson is a freelance telecommunications, IT and military communications journalist. He has also written for national and international media, and been a telecoms advisor to the World Bank.