Israeli start-up targets silicon photonics packaging

Created June 1, 2017
News and Business

Teramount has developed a technique to simplify the packaging of silicon photonics chips. Instead of using active alignment whereby an external laser is required to accurately connect a fibre to the chip, the Israeli start-up has developed a passive alignment technique.

“If we want silicon photonics to ramp up to volume, it has to meet CMOS standards both in terms of fabrication and packaging,” says Hesham Taha, co-founder and CEO of Teramount, headquartered in Jerusalem.

Teramount’s solution includes two elements: a PhotonicsPlug that is flip-chipped onto the silicon photonics die while still part of a wafer, and a ‘bump’, a design element added on the silicon photonics chip next to the optical waveguide. “Our solution, which we will be selling, is the PhotonicsPlug and we do require them [the designers] to add one element [the bump] to their silicon photonics chip,” says Taha.

The main PhotonicsPlug component is a silicon die comprising optics that manipulates the beam using self-aligning optics and focusses it onto the silicon photonics chip via a glass spacer. Teramount’s die also has V-grooves to interface the single-mode ribbon fibre.

The tolerance with which the die is attached to the silicon photonics wafer is up to ± 20 microns in each of the three dimensions such that standard flip-chip machines to be used.

Teramount has already shown working devices using the technology. The start-up is also working with several partners and has demonstrated its technology with their silicon photonics chip designs.

Being a small start-up, the company is focussed on developing the grating coupler solution but it has already started work on an edge-coupling technique to a device’s waveguides. Edge coupling is suited WDM-based silicon photonics chips. That is because grating couplers are wavelength-dependent while edge coupling supports a broader range of wavelengths.

See also:

 Teramount company website:

 Gazettabyte: Packaging silicon photonics using passive alignment


This article was written
by Roy Rubenstein

is the editor of and has been researching and writing about the telecom and semiconductor industries for over 20 years.